1. Field of the Invention
The present invention relates to a system and a memory access method in which one node connected to an optical network formed in the shape of a ring by the use of wavelength multiplexing and spatial multiplexing efficiently accesses a memory in another node by the use of time division multiplexed packets.
2. Description of Related Art
Non Uniform Memory Architecture (NUMA) is a memory architecture used for designing high-performance servers. NUMA is an architecture in which the costs of access to a memory shared by a plurality of CPUs are uneven in a manner that depends on the memory location and the CPU location. The reason why NUMA is mainstream is that migration of a centralized memory to distributed memories becomes mandatory as CPUs are parallelized so as to ensure the total bandwidth between CPUs and memories.
Here, a bandwidth means a transfer rate at which data are transferred, a centralized memory means a processing pattern in which many CPUs are connected to a single mass memory, and a distributed memory means a processing pattern in which distributed memories are provided in a plurality of CPUs. In a centralized memory, even when the number of CPUs is increased, an improvement in the performance is limited because data transfer between CPUs and a memory becomes a bottleneck. Thus, it is thought to be better to parallelize CPUs and adopt distributed memories to improve the performance.
A problem with NUMA is that there are variations in performance due to a difference in the access time between a plurality of memories (local memories) in a node including a CPU and the memories connected directly to the CPU and memories (remote memories) existing outside the node. The variations are one of the serious problems with performance in continuous progress of scale-up multiprocessing servers.
On the other hand, optical interconnect for interconnecting boards, chips, and the like by the use of an optical technique receives attention as a technique for eliminating restrictions on the transfer rate and transfer distance of data. For examples, refer to Japanese Unexamined Patent Application Publication No. 7-141312, Japanese Unexamined Patent Application Publication No. 7-264165 and Japanese Unexamined Patent Application Publication No. 10-105528. Due to the advance of this technique, a high-bandwidth interconnection between a CPU and a memory has been capable of being implemented even without necessarily disposing a memory physically close to a CPU. Thus, from the viewpoint of the bandwidth, a return to a centralized-memory system can be achieved by implementing access to a memory in a mass memory system by each CPU, using light, and this kind of implementation is being considered.
Recently, in the environment in which parallel processing is performed, a multi-core CPU including a plurality of processor cores encapsulated in a single processor package has been implemented so as to improve the performance by improving the overall throughput of a processor chip. In a sense, the trend toward multi-core goes against the trend toward NUMA in which problems have been solved by separating memories for individual cores.
In order to fully utilize the capability of multiple cores, a memory connected to the multiple cores, although partially, is constructed as a centralized memory for each chip, and thus a large bandwidth and memory capacity per chip are required. In the process of scale-up in which nodes each of which includes multiple cores are combined, not only the total bandwidth but also a decrease in the influence of a difference in performance between a local memory and a remote memory due to memory affinity setting by an OS and hypervisor are important in achieving a stable system performance.
Elimination of a difference in the access time between a local memory and a remote memory requires not only improving the total bandwidth but also efficiently performing random access from multiple CPUs to a memory via electrical multi-stage switches. From this standpoint, in a communication system in which wavelength division multiplexing (WDM) is adopted, not only the bandwidth expansion but also a technique for constructing an optical network using λ-switching have progressed. In this technique, since no electrical switch is used, a sender and a receiver can directly transfer high-bandwidth data, using a specific wavelength. WDM is a method for using an optical fiber in an overlapping manner by simultaneously using a plurality of optical signals having different wavelengths.
FIG. 1 shows a configuration example of Uniform Memory Architecture (UMA) in which the WDM technique is used. Four CPUs 10 are interconnected via an optical fiber 11 so as to form a ring. Each of the CPUs includes a plurality of processor cores. A plurality of memories 13 are connected to the CPU 10 via a memory bus 12.
In this configuration example, a specific wavelength is allocated to the memories 13 connected to the CPU 10 to access the memories 13, and the memories 13 are accessed, using light having the wavelength. In WDM, since the optical fiber 11 can be used in an overlapping manner by simultaneously using a plurality of optical signals having different wavelengths, a difference in the access time between a local memory and a remote memory associated with extra switching and hopping can be eliminated. Thus, the performance of future scale-up server systems can be significantly improved.
Data transfer between CPUs is performed using the optical fiber 11, and data transfer from a CPU to a memory is performed using the memory bus, as shown in FIG. 1. When the CPUs 10 have accesses at different wavelengths, no access contention occurs. However, when the CPUs 10 have accesses at a specific wavelength at the same time, access contention occurs. Thus, when a practical system is designed, in view of occurrence of accesses to the memories 13 at a certain location from a large number of CPUs 10, the key is how to efficiently handle access contention.
As compared with a network in which an I/O device such as an input and output interface is used, in a CPU-memory network, it is difficult to install, between a CPU and a memory, a mechanism ensuring the reliability between the CPU and the memory from end-to-end. Thus, even in a case where the probability of occurrence of packet loss due to access contention is low, once packet loss occurs, this may have a fatal effect on the operation of the system.
The unexamined Japanese patent applications referred to above disclose techniques for performing transmission by wavelength multiplexing, using an optical fiber, so as to reduce the number of wires but do not disclose any method for efficiently eliminating the aforementioned access contention, using an optical network. A practical method for this has not been proposed. One of the main reasons for this is that, due to restrictions on the switching time of a switch element, although an optical network is suitable for a high-bandwidth data plane based on a circuit switch that does not require too frequent switching, the applicable scope of an optical network is limited in, for example, packet processing including a control plane that involves frequent switching and requires complex processing.